shunt capacitance

英音[ ʃʌnt kəˈpæsɪtəns ] 美音[ ʃʌnt kəˈpæsɪtəns ]
并联电容:在电路中
常用释义
并联电容:在电路中,指与其他元件并联连接的电容器,用于存储电荷和调节电流。

例句

1·Shunt capacitance may increase the settling time.

分流电容可增大稳定时间。

2·This is discussed in detail in the paragraphs on Shunt Capacitance Loading and Guarding.

这一点在“分流电容负载和保护”一节中详细讨论。

3·As shown in Figure 2-35, the shunt capacitance (CSHUNT) must be charged to the test voltage by the current (IS).

如图2 - 35所示,并联电容(CSHUNT)必须由测试电流(IS)充电到测试电压。

4·Figure 2-7 demonstrates the effects of shunt capacitance loading on the input of a typical high impedance voltmeter.

图2 - 7说明分流电容对典型的高输入阻抗电压表输入端的影响。

5·In order to get the highest working efficiency of Class-E amplifier, it needs to get the exact values of shunt capacitance.

为了使E类放大器工作效率最大,需要得到并联电容的确切数值。

6·So it is not certain that the shunt capacitance compensator is completely protected by the arrester in the busbar. It is necessary t…

因此 ,母线上的避雷器不一定能完全保护并联补偿装置 ,应采取专门的措施来限制过电压。

7·While the primary advantage of guarding is a reduction in the effects of shunt resistance, another important aspect is the reduction in the effects of shunt capacitance.

保护技术的主要好处是减小分流电阻的影响,而其另一个重要的方面就是减少分流电容的影响。

8·The algorithm does not need fault type identification, and its accuracy is not affected by fault resistance, system impedance, pre-fault load current and shunt capacitance.

算法无需故障类型判别,不受系统阻抗、故障电阻、负荷电流以及分布电容的影响。

9·In order to minimize settling times when measuring high resistance values, keep shunt capacitance in the system to an absolute minimum by keeping connecting cables as short as possible.

在测量高阻值电阻时,为了尽量减小建立时间,使连接电缆尽可能地短,以便使系统中的并联电容实际上达到可能的最小值。

10·In this paper, the performance of tuned IPC is compared with that of two basic projects of non tuned IPC, i. e., the non tuned IPC with shunt capacitance and that with shunt inductance.

文章从性能方面对调谐型IPC以及非调谐型IPC的两个基本方案,即并联电容型IPC和并联电感型IPC做了比较。

同义词

并联电容;寄生电容